1. Field of the Invention
The invention relates to the field of electrical contacts particularly contacts between intermediate layers in an integrated circuit.
2. Prior Art
Numerous processes and structures are known for providing electrical contacts in integrated circuits between layers or between a layer and the substrate. For example, metal contacts have long been used to connect the lines and pads of an overlying metal layer with regions in the substrate such as source and drain regions. "Buried" contacts are frequently used to connect a first layer of metal or polycrystalline silicon (polysilicon) with a substrate region. Examples of such contacts are shown in U.S. Pat. Nos. 3,586,922 and 4,033,026. Processes for interconnecting intermediate metal layers are also known such as shown in U.S. Pat. No. 3,700,508. Contacts between layers through vias are discussed in "Evolution and Current Status of Aluminum Metallization" by Arthur J. Learn, Journal of the Electrochemical Society, Vol. 123, No. 6, June 1976.
Recently, more use has been made of double layers of polysilicon since the use of such layers has enabled an increase in circuit density. For example, double layers of polysilicon are used to form memory cells where the first layer defines floating gates and the upper layer, control gates. (See U.S. Pat. No. 3,996,657). In some instances, it is desirable to provide interconnections between members formed from these layers. The invented process provides contact regions between layers of polysilicon which are insulated from one another. Contact regions are formed by actual contact between the first and second layers of polysilicon. Thus, the contact regions are formed without requiring separate contact members, such as metal members. Moreover, with the invented process, contacts may be formed over buried contacts or directly over active channel regions. The contact regions of the present invention are self-aligning, thus no critical alignments are required.